Programming FPGA

Simple bit-shift example in VHDL

Here is another simple VHDL code to carryout simple bit shifting operation. I decided to post simple VHDL codes in this blog so that any newbie who reads this will be able to find some examples to work on. Make sure that you assign correct pins for inputs and outputs as mentioned in the

https://unboxnbeyond.wordpress.com/2013/03/24/hello-world-de0-nano-with-vhdl/#more-143

‘A’ should be connected to a push button
‘B’ should be connected to LEDs.

VHDL code:

library IEEE;
use IEEE.numeric_std.all;
use IEEE.std_logic_1164.all;

entity bitshiftror is
port (A: in std_logic;
		B: out std_logic_vector(7 downto 0));
end entity bitshiftror;

architecture bitshiftor of bitshiftror is

signal B_out: BIT_VECTOR(7 downto 0) := (0 => '1', others => '0');
constant n: NATURAL := 1;

begin
aa: process (A) is
begin
	if((A xor '1') = '1') then
		B_out <= (B_out ror n);

		B <= to_stdlogicvector(B_out);				
	end if;
end process aa;
end architecture bitshiftor;

Thank you.

Hello world DE0-Nano

Last few weeks i have been going through lots of books on FPGAs and VHDL. Now it is the time to write the first VHDL program. But before even writing a VHDL program I decided to draw a simple schematic design and power it up through the DE0-Nano.

First you need to start QuartusII and start a new project. Select Cyclone IV E device family and EP4CE22F17C6 device. That is the hardware you have in the DE0-Nano. After you created the project, just go to File > New. Then select Block diagram / Schematic file.

Now you will see the window where you should draw the design. Click on schadd icon. Then type ‘and2’ in the Name text box. Now you can draw and gates in the design by simply clicking on it. For time being just include one And gate.

and2

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